Embodiments disclosed herein relate generally to electrical technology, and more specifically to a semiconductor component and method of fabricating the same.
In the past, semiconductor heterostructure devices were commonly used in high-speed, low-noise, and power applications. A High Electron Mobility Transistor (HEMT) is a type semiconductor heterostructure device that has a current path formed by a two-dimensional electron gas (2DEG) layer generated at the interface between two types of semiconductor films having different band gaps. The 2DEG layer typically represents a sheet of electrons where electrons are confined and can move freely within two dimensions but are limited in movement in a third dimension.
Typical HEMT devices have comprised a channel-forming layer formed on a substrate and a Schottky layer formed on the channel-forming layer. Films having different band gaps are used as the channel-forming layer and the Schottky layer. For example, a gallium nitride (GaN) film has been used as the channel-forming layer, and an aluminum gallium nitride (AlGaN) film has been used as the Schottky layer, which forms the 2DEG layer at the interface between the channel-forming layer and the Schottky layer. A cap layer has been formed on the surface of the Schottky layer. A source electrode, a drain electrode, and a gate electrode have been disposed on the cap layer. The source electrode and drain electrode have been Ohmic electrodes that provide electrical connection through one or more of the layers to the 2DEG layer.
An appropriate potential applied to the gate electrode forms a depletion layer in the 2DEG layer. The depletion layer controls current flowing between the source electrode and the drain electrode. Electron mobility in the 2DEG layer is much greater than that of a normal semiconductor such as bulk silicon, which allows the HEMT to operate at a higher speed compared to a typical silicon based field effect transistor (FET).
The current flow between two lateral Ohmic electrodes is directly proportional to the surface perimeter of the electrodes. In the past, conventional approaches have used only a portion of the Ohmic contact length for conduction for electrically long contacts. Specifically, in conventional approaches a major portion of the current density passes through a front edge of the contact only with the remaining portion of the contact being used for only a minor portion of the current density leading to unnecessary wastage of area. Conventional approaches to solving this problem have included increasing the active area (width) of the heterostructure devices to enhance the surface area of the Ohmic contacts. Unfortunately, such approaches have led to the heterostructure devices having an undesired higher specific on-resistance (RDSON).
Accordingly, it would be desirable to have a structure and method that improves the characteristics of heterostructure semiconductor devices by effectively reducing the contact resistance by increasing the surface perimeter of the contact area, while maintaining substantially the same device dimension between the Ohmic contacts and 2DEG layer without causing current crowding, self-heating, and/or other performance issues.
For simplicity and clarity of the illustration(s), elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements, unless stated otherwise. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of a MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of a MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. One of ordinary skill in the art understands that the conductivity type refers to the mechanism through which conduction occurs such as through conduction of holes or electrons, therefore, and that conductivity type does not refer to the doping concentration but the doping type, such as P-type or N-type. It will be appreciated by those skilled in the art that the words during, while, and when as used herein relating to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there can be some small but reasonable delay(s), such as various propagation delays, between the reaction that is initiated by the initial action. Additionally, the term while means that a certain action occurs at least within some portion of a duration of the initiating action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to at least ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are reasonable variances from the ideal goal of exactly as described. The terms first, second, third and the like in the claims or/and in the Detailed Description of the Drawings, as used in a portion of a name of an element are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments described herein are capable of operation in other sequences than described or illustrated herein. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions generally may not be straight lines and the corners may not be precise angles.
In addition, the description may illustrate a cellular design (where the body regions are a plurality of cellular regions) instead of a single body design (where the body region is comprised of a single region formed in an elongated pattern, typically in a serpentine pattern). However, it is intended that the description is applicable to both a cellular implementation and a single base implementation.